1. Field of the Invention
The present invention relates to driver circuits for interfacing digital circuits to transmission lines, and more particularly, to a high performance backplane driver for interfacing CMOS (complimentary metal oxide semiconductor) circuits to low impedance terminated transmission lines.
2. Description of Related Art
The advent of digital computers and the like has enabled numerous circuits to be interconnected for binary communication over single segment or multi-segment transmission lines. These transmission lines, commonly known as backplane busses, are often provided in the form of long traces on the backplanes of a printed circuit boards. A typical backplane data bus is shown in FIG. 4, having a transmission line with its-opposite ends terminated to a regulated voltage, V.sub.tt, through termination resistors, R.sub.tt. The circuits would each be provided on cards, which would communicate with the bus through connectors provided along the trace. Each of the circuits is typically provided with drivers, which receive logic signals from internal components of the circuits and are capable of delivering a predetermined voltage signal to the bus. Receivers are also provided, which are capable receiving the voltage signals on the bus produced by the drivers and converting them to logic signals for the internal components.
A significant problem with the backplane data bus is that as the circuits with their associated drivers are added to the bus, the impedance of the bus drops significantly. A typical bus backplane has an unloaded characteristic impedance of 1000. The capacitative loading of each external circuit which is added to the bus decreases the overall impedance of the bus. It is not uncommon for a fully loaded bus to have an impedance level between 200 to 300. This lower impedance requires the drivers to produce more drive current in order to maintain the appropriate signal voltage level on the bus. For example, TTL (transistor-transistor logic) components require voltage level swings of 3 v to 5 v in order to register changes in logic state. A typical driver using TTL components has a 50 mA output current rating, which is sufficient to pull down a 1000 load connected to 5 v. However, when the load has been reduced to 200, as in a fully loaded bus, the driver current requirement jumps to 250 mA. This current requirement is clearly beyond the limits of a TTL component, and would quickly burn out the driver.
Simply increasing the power output capability of the driver only makes the problem worse. Output drivers which are capable of providing the higher current also increase the capacitative loading on the bus. Thus, as the driver power is increased, the requirement for greater power also increases, resulting in a never ending cycle, and which also fails to solve the initial problem. Additionally, the high power drivers also suffer from greater noise and cross-talk, along with greater power consumption, rendering them undesirable as a solution to the backplane driver problem.
A proposed solution to the backplane driver problem was provided in the prior art by a driver developed by National Semiconductor Corporation. The prior art driver uses BTL (backplane transistor logic) technology, which provides signal level swings between 1.1 v and 2 v. The driver circuit, shown generally at 20 in FIG. 1, provides a Schottky diode 24 connected between the bus and the collector of a Schottky transistor 22. The emitter of the transistor 22 is connected to ground, and the base receives the input voltage. A nominal high voltage level (i.e., the logical "one" level) applied to the base causes the transistor 22 to conduct and provides a voltage differential across the diode 24, which consequently drops the signal on the transmission line to the nominal low level. Conversely, a nominal low voltage signal (i.e., the logical "zero" level) prevents the transistor 22 from conducting, which cuts off the flow of current through the diode 24. It should be apparent that when the driver 20 is not conducting, the maximum capacitance seen from the bus is limited to that of the reversed biased Schottky diode 24. The reduced capacitative loading maintains the bus impedance at close to the unloaded level and keeps the current requirement for the driver at a manageable level.
However, a problem with the prior art driver is its incompatibility with the TTL or CMOS components typically used in the external circuits. The differing kinds of components cannot be provided on a single integrated circuit since the components require different materials. The use of different component types also adds complexity to the circuit, and decreases the amount of available board space on the external circuit boards.
An additional problem with the BTL driver, as well as with other types of prior art drivers, is that of heat dissipation. The voltage swing which the driver must provide is directly related to the power which must be dissipated by the driver. The power is dissipated internally in the form of heat which must ultimately be removed from the circuit to prevent the circuit from overheating which can damage adjacent components on the circuit board. To reduce the heat dissipation requirement, it is necessary to minimize the driver's voltage swing requirement.
The use of CMOS technology is quite popular in the art, since CMOS circuits can be formed to relatively high gate densities. CMOS transistors configured with the drain directly connected to the bus would introduce very low capacitative load, and thus would be desirable for use in a backplane driver. However, CMOS circuits require a nominal 5 v voltage swing, which would be unacceptably high due to the power dissipation problem discussed above. In addition, the speed of the logic level changes in typical CMOS circuits would produce noise on the ground bus and on the backplane data bus.
Therefore, it would be desirable to provide a backplane driver which would introduce relatively low capacitative load to a terminated transmission line. It would be further desirable to provide a backplane driver utilizing relatively low voltage swings to minimize power dissipation. It would be still further desirable to provide a backplane driver which could be implemented in existing CMOS technology for interfacing with CMOS circuits.